Motorola DragonBall MC9328MX1 Reference Manual page 766

Universal Asynchronous Receiver/Transmitters (UART) Modules
Table 27-15. UART1 Control Register 2 and UART2 Control Register 2 Description (Continued)
Name
RXEN Receiver Enable—Enables/Disables the receiver. When the
Bit 1 receiver is enabled, if the RXD input is already low, the receiver
does not recognize BREAK characters, because it requires a
valid 1-to-0 transition before it can accept any character.
SRST Software Reset—Resets the transmitter and receiver state
Bit 0 machines, all FIFOs, and all status registers. Once the software
writes 0 to SRST, the software reset remains active for 4 clock
cycles of CKIH before the hardware deasserts SRST. The
software can only write 0 to SRST. Writing 1 to SRST is ignored.
27-30
Description
MC9328MX1 Reference Manual
Settings
0 = Disable the receiver
1 = Enable the receiver
0 = Reset the transmit and receive
state machines, all FIFOs and
all status registers
1 = No reset
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