Pwm Period Register; Table 22-6 Pwm Period Register Description - Motorola DragonBall MC9328MX1 Reference Manual

22.4.3 PWM Period Register

This register controls the pulse-width modulator period. When the counter value matches PERIOD + 1, the
counter is reset to start another period. The following equation applies:
PWMO (Hz) = PCLK (Hz) ÷ (PERIOD + 2)
Writing 0xFFFF to this register achieves the same result as writing 0xFFFE.
The register bit assignments are shown in the following register display. The register settings are described
in Table 22-6.
PWMP
BIT 31 30 29
TYPE r r r
0 0 0
RESET
BIT 15 14 13
TYPE rw rw rw
1 1 1
RESET
Name
Reserved Reserved—These bits are reserved and should read 0.
Bits 31–16
PERIOD Period—Represents the pulse-width modulator's period control value.
Bits 15–0
MOTOROLA
PWM Period Register
28 27 26 25
r r r r
0 0 0 0
12 11 10 9
rw rw rw rw
1 1 1 1
Table 22-6. PWM Period Register Description
Pulse-Width Modulator (PWM)
24 23 22 21 20
r r r r
0 0 0 0
0x0000
8 7 6 5
PERIOD
rw rw rw rw rw
1 1 1 1
0xFFFE
Description
Programming Model
Eqn. 22-1
Addr
0x00208008
19 18 17
r r r r
0 0 0 0
4 3 2 1
rw rw rw
1 1 1 1
22-7
16
r
0
0
rw
0