Programming Example; Data Access To 8-Bit Peripherals; Table 7-12 Time-Out Status Register Description - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
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Name
TO
Time-Out—This bit when set to 1 indicates a time-out event and may be
Bit 31
cleared by the user.
RW
This bit contains the ips_rwb status prior to time-out event.
Bit 30
ADDR
Address—These bits contains the ips_addr[11:2] status prior to time-out
Bits 29–20
event.
BE4
This bit contains the ips_byte_31_24 status prior to time-out event.
Bit 19
BE3
This bit contains the ips_byte_23_16 status prior to time-out event.
Bit 18
BE2
This bit contains the ips_byte_15_8 status prior to time-out event.
Bit 17
BE1
This bit contains the ips_byte_7_0 status prior to time-out event.
Bit 16
MODULE_EN
Module Enable Status—These bits contains the module_en[15:1] status
Bits 14–1
prior to time-out event. Refer to Table 7-6 to determine which peripheral
is assigned to which module_en number. assignment of
Reserved
Reserved—This bit is reserved and should read 0.
Bit 0

7.3 Programming Example

This section covers programming examples written in assembly code to illustrate the data access through
the AIPI module.

7.3.1 Data Access to 8-Bit Peripherals

The followings codes are executed with the ARM920T core set to big and little endian modes:
LDR
LDR
LDR
STRB
STRB
STRH
STR
LDRB
LDRB
LDRH
LDR
The Table 7-13 on page 7-18 illustrates the difference in the 8-bit peripheral register content.
MOTOROLA
Table 7-12. Time-Out Status Register Description
Description
r0,
=0x11223344
r1,
=0x55667788
r2,
=8BIT_PERIPHERAL_ADDRESS
r0,
[r2, #0x0]
r1,
[r2, #0x1]
r0,
[r2, #0x2]
r1,
[r2, #0x4]
r3,
[r2, #0x0]
r4,
[r2, #0x1]
r5,
[r2, #0x2]
r6,
[r2, #0x4]
AHB to IP Bus Interface (AIPI)
Programming Example
Settings
0 = No time-out
event
1 = time-out event
0= Corresponding
module has not
timed out
1 = Corresponding
module has
timed out
7-17

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