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INC and MOD preset registers are selected (if the BPEN bit is asserted). This feature is available for
16 MHz, 25 MHz, or 30 MHz reference frequencies only. Enabling this feature with any other reference
frequency is not supported and is undefined. The corresponding reference frequency bits in the control
register (they are in different registers) must also be set (REF16, REF25, or REF30).
When the BPEN bit is not asserted (BPEN = 0), non-integer division is performed for all detections. This
method works with any reference frequency. Based on the reference frequency, the UART computes the
baud rate on the fly.
If any of the UART BRM registers are written to simultaneously by the baud rate automatic detection logic
and peripheral data bus, the peripheral data bus has priority.
27.5.9.1 Baud Rate Automatic Detection Protocol
The receiver must receive an ASCII character "A" or "a" to verify proper detection of the incoming baud
rate. When an ASCII character "A" or "a" is received and no error occurs, the Automatic Detect baud rate
bit is set (ADET=1) and if the interrupt is enabled (ADEN=1),an interrupt UART_MINT_UARTC is
generated.
When an ASCII character "A" or "a" is not received (because of a bit error or the transmission of another
character), the value written into the UBIR_1/UBIR_2 and UBMR_1/UBMR_2 registers may not be
accurate. When the ADET bit is not asserted after the required time-out value (based on baud rate, word
size, parity, and number of stop bits), look out for the parity/frame error interrupt (UART_MINT_PFERR
= 0) if enabled. After the interrupt is asserted, re-send the character "A" or "a" and repeat the above
procedure until the ADET bit is set.
As long as ADET = 0 and ADBR = 1, the UART continues to try to lock onto the incoming baud rate.
Once the ASCII character "A" or "a" is detected and the ADET bit is set, the receiver ignores the ADBR
bit and continues normal operation with the calculated baud rate divisor.
The UART interrupt is active (UART_MINT_UARTC = 0) as long as ADET = 1 and ADBR = 1. This can
be disabled by clearing the automatic baud rate detection interrupt enable bit (ADEN = 0). Before starting
an automatic baud rate detection sequence, set ADET = 0 and ADBR = 1.
The RxFIFO must contain the ASCII character "A" or "a" following the automatic baud rate detection
interrupt, which can be cleared by reading it. Because this UART has standard reference frequencies of
16 MHz, 25 MHz, or 30 MHz, the highest achievable baud rate is determined by the value of the reference
frequency ÷ 16).
The 16-bit UART Baud Rate Count Register (UBRC_1/UBRC_2) is reset to 8 and stays at 0xFFFF when
an overflow occurs. The UBRC_1/UBRC_2 register counts the start bit of the incoming baud rate. When
the start bit is detected and counted, the UART Baud Rate Count Register retains its value until the next
automatic baud rate detection sequence is initiated.
The read only Baud Rate Count Register counts only when auto detection is enabled.
MOTOROLA
Universal Asynchronous Receiver/Transmitters (UART) Modules
Table 27-9. Highest Baud Rates
Reference Frequency (MHz)
16 MHz
25 MHz
30 MHz
Highest Baud Rate (bps)
1 Mbps
1.5625 Mbps
1.875 Mbps
Sub-Block Description
27-17
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