Mma Mac Control Register; Table 17-3 Mma Mac Control Register Description - Motorola DragonBall MC9328MX1 Reference Manual

Table 17-2. MMA MAC Module Register Description (Continued)
Name
Reserved Reserved—These bits are reserved and should read 0.
Bits 30–1
MOD ENAB Module Enable—Enables or disables the MAC.
Bit 0

17.3.1.2 MMA MAC Control Register

MMA_MAC_CTRL
BIT 31 30 29
TYPE w w rw
0 0 0
RESET
BIT 15 14 13
TYPE r r r
0 0 0
RESET
Name
X MODIFY X Modify Preset—Presets MMA_MAC_XMODIFY register
PRESET to value 0x00000004.
Bit 31
X INDEX CLR X Index Clear—Clears MMA_MAC_XINDEX register to
Bit 30 value of 0x00000000.
X INDEX INCR X Index Increment—Determines whether the
Bit 29 MMA_MAC_XINDEX register in the XDAC module is
incremented by the value in the MMA_MAC_XINCR
register for every (MMA_MAC_XCOUNT + 1) iteration.
X INDEX INCR is used with X INDEX LOAD.
MOTOROLA
Description
MMA MAC Control Register
28 27 26 25
rw rw rw rw
0 0 0 0
12 11 10 9
r r r r
0 0 0 0
Table 17-3. MMA MAC Control Register Description
Description
Multimedia Accelerator (MMA)
24 23 22 21 20
rw w w rw rw
0 0 0 0 0
0x0000
8 7 6 5 4
r r r r r
0 0 0 0 0
0x0000
0 = MMA_MAC_XMODIFY
1 = MMA_MAC_XMODIFY
0 = MMA_MAC_XINDEX Register
1 = MMA_MAC_XINDEX Register
0 = MMA_MAC_XINDEX is not
1 = MMA_MAC_XINDEX register
Programming Model
Settings
0 = Disable the MAC
1 = Enable the MAC
Addr
0x00222004
19 18 17 16
rw rw rw rw
0 0 0 0
3 2 1 0
CACHE CACHE
OP EN
CLR EN
r w rw rw
0 0 0 0
Settings
Register is not preset
Register is preset to value
0x00000004
is not reset.
is reset to value 0x00000000
incremented
is incremented
17-7