Normal Interrupt Priority Level Register 4; Table 10-15 Normal Interrupt Priority Level Register 4 Description - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
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10.4.7.4 Normal Interrupt Priority Level Register 4

NIPRIORITY4
BIT
31
30
29
NIPR39
TYPE
rw
rw
rw
0
0
0
RESET
BIT
15
14
13
NIPR35
TYPE
rw
rw
rw
0
0
0
RESET
Table 10-15. Normal Interrupt Priority Level Register 4 Description
Name
NIPR39
Normal Interrupt Priority Level—Selects the software
Bits 31–28
controlled priority level for the associated normal interrupt
source.
NIPR38
Bits 27–24
These registers do not affect the prioritization of fast
interrupt priorities.
NIPR37
Bits 23–20
NIPR36
Bits 19–16
NIPR35
Bits 15–12
NIPR34
Bits 11–8
NIPR33
Bits 7–4
NIPR32
Bits 3–0
MOTOROLA
Normal Interrupt Priority Level Register 4
28
27
26
25
NIPR38
rw
rw
rw
rw
0
0
0
0
12
11
10
9
NIPR34
rw
rw
rw
rw
0
0
0
0
Description
Interrupt Controller (AITC)
24
23
22
21
20
NIPR37
rw
rw
rw
rw
rw
0
0
0
0
0
0x0000
8
7
6
5
4
NIPR33
rw
rw
rw
rw
rw
0
0
0
0
0
0x0000
0000 = Lowest priority normal
interrupt
...
1111 = Highest priority normal
interrupt
Programming Model
Addr
0x0022302C
19
18
17
16
NIPR36
rw
rw
rw
rw
0
0
0
0
3
2
1
0
NIPR32
rw
rw
rw
rw
0
0
0
0
Settings
10-19

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