Motorola DragonBall MC9328MX1 Reference Manual page 84

Signal Descriptions and Pin Assignments
Table 2-2. MC9328MX1 Signal Multiplexing Scheme (Continued)
I/O Supply BGA
Voltage Pin
BTRFVDD E10
BTRFVDD D10
C10 BTRFGND
NVDD3 A10
NVDD3 G9 SPI1_MOSI
NVDD3 F9 SPI1_MISO
NVDD3 E9
NVDD3 B9 SPI1_SCLK
NVDD3 D9 SPI1_SPI_RDY
NVDD3 A9 UART1_RXD
NVDD3 C9 UART1_TXD
NVDD3 A8 UART1_RTS
NVDD3 G8 UART1_CTS
NVDD3 B8 SSI_TXCLK
NVDD3 F8 SSI_TXFS
NVDD3 E8 SSI_TXDAT
NVDD3 D8 SSI_RXDAT
NVDD3 B7 SSI_RXCLK
NVDD3 C8 SSI_RXFS
A7
NVDD4 C7 UART2_RXD
NVDD4 F7 UART2_TXD
NVDD4 E7 UART2_RTS
NVDD4 C6 UART2_CTS
NVDD4 D7 USBD_VMO
NVDD4 D6 USBD_VPO
NVDD4 E6 USBD_VM
NVDD4 B6 USBD_VP
NVDD4 D5 USBD_SUSPND
NVDD4 C5 USBD_RCV
2-16
Primary
Signal Dir Pull-up
BT12 O
BT13 O
Static
NVDD3 Static
I/O
I/O
SPI1_SS I/O
I/O
I
I
O
I
O
I/O
I/O
O
I
I/O
I/O
VSS Static
I
O
I
O
O
O
I
I
O
I/O
MC9328MX1 Reference Manual
Alternate
Signal Dir Mux
PC20
PC19
PC17
PC16
PC15
PC14
PC13
PC12
PC11
PC10
PC9
PC8
PC7
PC6
PC5
PC4
PC3
PB31
PB30
PB29
PB28
PB27
PB26
PB25
PB24
PB23
PB22
GPIO
Default
Pull-up
69K PC20
69K PC19
69K PC17
69K PC16
69K PC15
69K PC14
69K PC13
69K PC12
69K PC11
69K PC10
69K PC9
69K PC8
69K PC7
69K PC6
69K PC5
69K PC4
69K PC3
69K PB31
69K PB30
69K PB29
69K PB28
69K PB27
69K PB26
69K PB25
69K PB24
69K PB23
69K PB22
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