External Interrupts; Schematic Diagram Of The User Interrupt Interface; On-Board Host Target Interface Power Source Jumper Selection - Motorola 56F805 Hardware User Manual

Table 2-5. Parallel JTAG Interface Connector Description
Pin #
10
11
12
13
Table 2-6. On-Board Host Target Interface Power Source Jumper Selection

2.8 External Interrupts

Two on-board push-button switches are provided for external interrupt generation, as
shown in 2-6. S1 allows the user to generate a hardware interrupt for signal line
Figure
IRQA. S2 allows the user to generate a hardware interrupt for signal line IRQB. These two
switches allow the user to generate interrupts for his user-specific programs.
Figure 2-6. Schematic Diagram of the User Interrupt Interface
2-10
Freescale Semiconductor, Inc.
P1
Signal
NC
PORT_TDO
NC
PORT_CONNECT
JG11
1–2 Host supplied power
2–3 Target supplied power
+3.3V
IRQA
+3.3V
IRQB
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Pin # Signal
23 GND
24 GND
25 GND
Comment
56F805
IRQA
IRQB
MOTOROLA