Motorola DragonBall MC9328MX1 Reference Manual page 943

Integrated portable system processor
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Index
Numerics
3 Volt SIM card, see 3VOLT bit
32 kHz clock signal, see CLK32 signal
3VOLT bit, 25-22
A
ACCU COUNTER field, 17-10
ADDRESS field, 16-78
AIPI
data access to 16-bit peripherals, 7-18
data access to 32-bit peripherals, 7-19
data access to 8-bit peripherals, 7-17
features, 7-1
general information, 7-1
non-natural size access, 7-20
overview, 7-1
programming example, 7-17
programming model, 7-10
AIPI 1 & 2 peripheral size register 0, see PSR0_n,
AIPI 1 & 2 peripheral size register 1, see PSR1_n,
AIPI module register memory map, 7-10
AIPI peripheral address MODULE_EN numbers, 7-10
AIPI registers
PAR_n, 7-14
PCR_n, 7-15
PSR0_n, 7-12
PSR1_n, 7-13
TSR_n, 7-16
AITC
assigning interrupt sources, 10-34
enabling interrupt sources, 10-34
features, 10-1
input signals, 10-3
interrupt assignments, 10-3
introduction, 10-1
-
operation, 10-2
10-3
prioritization of interrupt sources, 10-34
programming model, 10-4
register field summary, 10-6
register memory map, 10-4
writing reentrant normal interrupt routines, 10-36
ALRM_HM register
HOURS field, 23-8
MINUTES field, 23-8
ALRM_HM register, 23-8
MOTOROLA
-
10-4
MC9328MX1 Reference Manual
ALRM_SEC register
SECONDS field, 23-9
ALRM_SEC register, 23-9
ANACK bit, 25-25
Analog signal processor, see ASP
ARGH register, 20-29
ARGH register, ARGUMENT HIGH field, 20-30
ARGL register
ARGUMENT LOW field, 20-30
ARGL register, 20-30
ARM Thumb
instruction set, 4-7
ARM920T processor
ARMv4T Architecture, 4-4
cache lock-down, 4-3
caches, 4-2
conditional execution, 4-5
control coprocessor, 4-4
exception types, 4-5
instruction classes, 4-5
instruction set, 4-7
introduction, 4-1
macrocell, 4-2
MMUs, 4-3
modes and exception handling, 4-4
modes and registers, 4-9
PATAG RAM, 4-3
prioritization of exception sources, 10-34
Registers, 4-4
reset, 6-2
status registers, 4-4
system controller, 4-3
typical interrupt entry sequences, 10-35
write buffer, 4-3
ARMMCMSEL field, 17-25
ASP
auto zero function, 15-7
clock divide register, see ASP_CLKDIV register
control register, 15-9
current-mode operation
calculating current, 15-5
features, 15-1
interrupt control register,
see ASP_ICNTLR register
interrupt generation, 15-3
interrupt/error status registerA,
see SP_ISTATR register
operation, 15-1
-
4-7
Index-i

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