Table 32-3. GPIO Multiplexing Table with AIN, BIN, CIN, AOUT, and BOUT (Continued)
Primary
Alternate Signal
Signal
A19
ETMPIPESTAT[
3]
A20
ETMPIPESTAT[
0]
A21
ETMPIPESTAT[
1]
A22
ETMPIPESTAT[
2]
A23
ETMTRACECLK
A24
ETMTRACESYN
C
DTACK
ETMTRACEPKT
[4]
TIN
–
TOUT2
–
SPL_SPR
UART2_DSR
PS
UART2_RI
CLS
UART2_DCD
REV
UART2_DTR
SPI_RDY
–
32.5 Programming Model
There are four sets of control registers corresponding to the four GPIO ports. Each port has 17 registers
associated with it, located at sequential addresses in the memory map. Table 32-4 summarizes these
registers and their addresses.
The starting address of each register set is known as the base address and is referred to by the term $BA.
The base addresses for the four GPIO ports are as follows:
•
GPIO Port A $BA = 0x0021C000
•
GPIO Port B $BA = 0x0021C100
•
GPIO Port C $BA = 0x0021C200
•
GPIO Port D $BA = 0x0021C300
MOTOROLA
GPIO
AIN[i]
Mux
–
–
–
–
–
–
–
–
–
–
PA0
SPI2_CL
K
PA17
SPI2_SS
PA1
–
PD31
–
PD10
SPI2_TX
D
PD9
–
PD8
SPI2_SS
PD7
SPI2_CL
K
PC13
–
GPIO Module and I/O Multiplexer (IOMUX)
CIN[
BIN[i]
AOUT[i]
i]
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
A25
–
–
–
––
SPI2_RXD
SPI2_TX
–
–
D
–
–
–
–
–
SPI2_RXD
–
–
–
–
–
–
–
–
DMA_DRE
Q
Programming Model
BOUT[
Defau
i]
lt
–
A19
–
A20
–
A21
–
A22
–
A23
–
A24
–
PA17
–
PA1
–
PD31
–
PD10
–
PD9
–
PD8
–
PD7
–
PC13
32-7