Table 29-3 I 2 C Address Register Description - Motorola DragonBall MC9328MX1 Reference Manual

2
29.6.1 I C Address Register
2
The I C Address Register (IADR) holds the address to which the I
As part of the I2C communications protocol, the master sends out the 7-bit
address of the slave it intends to transfer data to or receive data from. When
the MC9328MX1 is the bus master, the address it sends out is the address
of its intended slave device. It is NOT the address in this register. This
value is only referenced when another device is bus master and it intends
to communicate with the MC9328MX1.
IADR
BIT 31 30 29
TYPE r r r
0 0 0
RESET
BIT 15 14 13
TYPE r r r
0 0 0
RESET
Name
Reserved Reserved—These bits are reserved and should read 0.
Bits 31–8
ADR Slave Address—Contains the specific slave address to be used by the I
Bits 7–1 the default I
Reserved Reserved—This bit is reserved and should read 0.
Bit 0
MOTOROLA
2
I C Address Register
28 27 26 25
r r r r
0 0 0 0
12 11 10 9
r r r r
0 0 0 0
2
Table 29-3. I C Address Register Description
2
C mode for an address match on the bus.
2
I C Module
2
C responds when addressed as a slave.
NOTE:
24 23 22 21
r r r r
0 0 0 0
0x0000
8 7 6 5
r rw rw rw
0 0 0 0
0x0000
Description
Programming Model
Addr
0x00217000
20 19 18 17
r r r r
0 0 0 0
4 3 2 1
ADR
rw rw rw rw
0 0 0 0
2
C module. Slave mode is
16
r
0
0
r
0
29-7