Motorola DragonBall MC9328MX1 Reference Manual page 85

Table 2-2. MC9328MX1 Signal Multiplexing Scheme (Continued)
I/O Supply BGA
Voltage Pin
NVDD4 B5 USBD_OE
NVDD4 A5 USBD_AFE
A4
NVDD4 A6
NVDD4 G7
NVDD4 F6
NVDD4 G6
NVDD4 B4
NVDD4 C4
NVDD4 D4 SIM_SVEN
NVDD4 B3
NVDD4 A3
NVDD4 A2
NVDD4 E5
NVDD4 B2
NVDD4 C3
MOTOROLA
I/O Pads Power Supply and Signal Multiplexing Scheme
Primary
Signal Dir Pull-up
O
O
VSS Static
NVDD4 Static
SIM_CLK O
SIM_RST O
SIM_RX I
SIM_TX I/O
SIM_PD I
O
SD_CMD I/O
SD_SCLK O
SD_DAT3 I/O
SD_DAT2 I/O
SD_DAT1 I/O
SD_DAT0 I/O
Signal Descriptions and Pin Assignments
Alternate
Signal Dir Mux
PB21
PB20
SSI_TXCLK I/O PB19
SSI_TXFS I/O PB18
SSI_TXDAT O PB17
SSI_RXDAT I PB16
SSI_RXCLK I/O PB15
SSI_RXFS I/O PB14
MS_BS O PB13
MS_SCLKO O PB12
MS_SDIO I/O PB11
MS_SCLKI I PB10
MS_PI1 I PB9
MP_PI0 I PB8
GPIO
Default
Pull-up
69K PB21
69K PB20
69K PB19
69K PB18
69K PB17
69K PB16
69K PB15
69K PB14
69K PB13
69K PB12
69K PB11
(pull
down)
69K PB10
69K PB9
69K PB8
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