Timer Compare Registers 1 And 2; Table 26-5 Timer 1 And 2 Compare Registers Description - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
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General-Purpose Timers

26.2.3 Timer Compare Registers 1 and 2

Each timer compare register (TCMP1 and TCMP2) contains the value that is compared with the
free-running counter. A compare event is generated when the counter matches the value in this register.
This register is set to 0xFFFFFFFF at system reset. Table 26-5 provides the register description.
TCMP1
TCMP2
BIT
31
30
29
TYPE
rw
rw
rw
F
F
F
RESET
BIT
15
14
13
TYPE
rw
rw
rw
F
F
F
RESET
Table 26-5. Timer 1 and 2 Compare Registers Description
Name
COMPARE VALUE
Bits 31–0
26-6
Timer 1 Compare Register
Timer 2 Compare Register
28
27
26
25
rw
rw
rw
rw
F
F
F
12
11
10
rw
rw
rw
rw
F
F
F
Compare Value—Holds the value at which a compare event will be triggered.
MC9328MX1 Reference Manual
24
23
22
21
COMPARE VALUE
rw
rw
rw
rw
F
F
F
F
F
0xFFFF
9
8
7
6
5
COMPARE VALUE
rw
rw
rw
rw
F
F
F
F
F
0xFFFF
Description
Addr
0x00202008
0x00203008
20
19
18
17
rw
rw
rw
rw
F
F
F
F
4
3
2
1
rw
rw
rw
rw
F
F
F
F
MOTOROLA
16
rw
F
0
rw
F

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