Interrupt Force Register High And Interrupt Force Register Low; Table 10-24 Interrupt Force Register High Description - Motorola DragonBall MC9328MX1 Reference Manual

Interrupt Controller (AITC)
10.4.11 Interrupt Force Register High and Interrupt Force Register
Low
The Interrupt Force Register High (INTFRCH) and the Interrupt Force Register Low (INTFRCL) registers
are each 32 bits wide. The interrupt forces registers allow for software generation of interrupts for each of
the possible interrupt sources for functional or debugging purposes. The system level design can reserve
one or more sources for software purposes to allow software to self-schedule interrupts by forcing one or
more of these sources in the appropriate interrupt force register(s).
These registers are located on the ARM920T processor's native bus, are accessible in 1 cycle, and can be
accessed only in supervisor mode. These registers must be accessed only on word (32-bit) boundaries.
10.4.11.1 Interrupt Force Register High
INTFRCH
BIT 31 30 29
TYPE rw rw rw
0 0 0
RESET
BIT 15 14 13
TYPE rw rw rw
0 0 0
RESET
Table 10-24. Interrupt Force Register High Description
Name
FORCE Interrupt Source Force Request—Forces a request for the
Bits 31–0 corresponding interrupt source.
10-28
Interrupt Force Register High
28 27 26 25
FORCE [63:48]
rw rw rw rw
0 0 0 0
12 11 10 9
FORCE [47:32]
rw rw rw rw
0 0 0 0
Description
MC9328MX1 Reference Manual
24 23 22 21 20
rw rw rw rw rw
0 0 0 0 0
0x0000
8 7 6 5 4
rw rw rw rw rw
0 0 0 0 0
0x0000
0 = Standard interrupt operation
1 = Interrupt forced asserted
Addr
0x00223050
19 18 17 16
rw rw rw rw
0 0 0 0
3 2 1 0
rw rw rw rw
0 0 0 0
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