Motorola DragonBall MC9328MX1 Reference Manual page 945

Integrated portable system processor
Table of Contents

Advertisement

read/write examples, 9-5
record format, 9-2
register usage, 9-3
setting up RS-232 terminal, 9-3
BTA
Bluetooth core, 16-3
Bluetooth primer, 16-1
module descriptions, 16-3
overview, 16-2
pin configuration, 16-19
programming model, 16-20
sequencer registers
command register, 16-26
sequencer registers, 16-26
wake-up module, 16-18
BUCRx register
CCNT field, 13-29
BUCRx register, 13-29
BUF_WORD_0 (LW0) register, 16-63
BUF_WORD_1 (LW0) register, 16-63
BUF_WORD_31 (LW7) register, 16-63
BUFFER_ACCESS register
FIFO CONTENT field, 20-32
BUFFER_ACCESS register, 20-32
BURST COUNT bits, 17-14
BYTE_REVERSED field, 16-90
BYTE2 field, 16-75
BYTE3 field, 16-75
C
CACHE CLR bit, 17-9
CACHE EN bit, 17-9
CAP field, 26-4
CAPT bit, 26-9
Capture edge field, see CAP field
Capture edge, see CAP bit
Capture event, see CAPT bit
CAPTURE VALUE field, 26-7
CCRx register
CEN bit, 13-24
DMOD field, 13-23
DSIZ field, 13-23
FRC bit, 13-24
MDIR bit, 13-23
MSEL bit, 13-23
REN bit, 13-23
RPT bit, 13-23
SMOD field, 13-23
SSIZ field, 13-23
CCRx register, 13-22
CGPCR register
SI_PROT_EN bit, 8-5
Channel x burst length register, see BLRx register 13-26
MOTOROLA
Channel x bus utilization control register,
Channel x control register, see CCRx register
Channel x count register, see CNTRx register
Channel x destination address register,
Channel x request source select register,
Channel x request time-out register, see RTORx register
Channel x source address register, see SARx register
CHAR_WAIT register, 25-39
Character wait time counter flag, see CWT bit
Character wait time counter, see CWTEN bit
CHARACTER WAIT TIME field, 25-39
Character wait time interrupt mask, see CWTM bit
Character wait timer register, see CHAR_WAIT register
Chip select 0 control registers,
Chip select 1 - 5 control registers, see CS1U - CS5U and
CLK_CONTROL register
CLK_CONTROL register, 16-72
CLK_RATE register
CLK_RATE register, 20-19
CLK_SEL field, 25-24
CLK32 signal, 6-3
CLKSOURCE field, 26-5
Clock control register, see CLK_CONTROL register
Clock source control register, see CSCR register
Clock source, see CLKSOURCE field
CMD register
CMD register, 20-29
CMD_DAT_CONT register
CMD_DAT_CONT register, 20-20
MC9328MX1 Reference Manual
see BUCRx register
see DARx register
see RSSRx register
see CSOU and CSOL registers
CS1L - CS5L registers
BT1_CLK_IN_DIV field, 16-72
BT1_RSLOT field, 16-72
BT1_WSLOT field, 16-72
RFM field, 16-72
CLK RATE field, 20-19
PRESCALER field, 20-19
COMMAND NUMBER field, 20-29
BUS_WIDTH field, 20-20
BUSY bit, 20-21
CMD_RESP_LONG_OFF bit, 20-20
DATA_ENABLE bit, 20-21
FORMAT_OF_RESPONSE field, 20-21
INIT bit, 20-20
START_READWAIT bit, 20-20
STOP_READWAIT bit, 20-20
STREAM_BLOCK bit, 20-21
WRITE_READ bit, 20-21
Index-iii

Advertisement

Table of Contents
loading

Table of Contents