Precharge Command Mode (Smode = 001); Figure 24-15 Burst Write Followed By On-Page Read Timing Diagram; Figure 24-16 Single Read Followed By On-Page Write Timing Diagram; Figure 24-17 Burst Read Followed By On-Page Write Timing Diagram - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
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SDCLK
ADDR
RAS, CAS, SDWE
CSDx
DATA
Figure 24-15. Burst Write Followed by On-Page Read Timing Diagram
SDCLK
ADDR
ROWn
RAS,
ACT
CAS,
SDWE
CSDx
DATA
Figure 24-16. Single Read Followed by On-Page Write Timing Diagram
SDCLK
ADDR
RAS, CAS, SDWE
CSDx
DATA
Figure 24-17. Burst Read Followed by On-Page Write Timing Diagram

24.6.3 Precharge Command Mode (SMODE = 001)

The Precharge Command Mode (SMODE = 001) is used during SDRAM device initialization, and to
manually deactivate any and all active banks. While in this mode, an access (either read or write) to the
SDRAM address space will generate a precharge command cycle. SDRAM address bit A10 determines
MOTOROLA
COL1n
ROWn
COL2n COL3n COL4n
t
RCD
ACT
NOP
WRIT
WRIT WRIT WRIT NOP READ
D1n
D3n
D2n
COLn
t
RCD
NOP
READ
TBST
CAS Latency
COL1n
ROWn
t
RCD
NOP
ACT
READ
NOP NOP NOP NOP NOP NOP NOP NOP NOP
CAS Latency
SDRAM Memory Controller
COLb
TBST
CAS Latency
D4n
NOP
NOP
NOP
WRIT
D1n
D2b
D3n
D4n
D1n
D2n
Operating Modes
D1b
COLb
NOP
COLb
WRIT NOP
D1b
24-23

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