Uart Brm Modulator Registers; Table 27-25 Uart1 Brm Modulator Register And Uart2 Brm Modulator Register Description - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
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Universal Asynchronous Receiver/Transmitters (UART) Modules

27.7.13 UART BRM Modulator Registers

The UART BRM (Binary Rate Multiplier) Modulator Registers hold the denominator value (minus one) of
the BRM ratio. These registers can be written to at any time. Hardware updates the BRM Modulator value
at the appropriate time to avoid glitches on the BRM_CLK output (sampling clock).
The BRM is not updated until both the Modulator (UBMR_1/UBMR_2) and the Incremental
(UBIR_1/UBIR_2) registers are written to by software. If only one register is written to by the software,
the BRM ignores this data until the other register is also written.
UBMR_1
UBMR_2
BIT
31
30
29
TYPE
r
r
r
0
0
0
RESET
BIT
15
14
13
TYPE
rw
rw
rw
0
0
0
RESET
Table 27-25. UART1 BRM Modulator Register and UART2 BRM Modulator Register Description
Name
Reserved
Reserved—These bits are reserved and should read 0.
Bits 31–16
MOD
Modulator Denominator—Holds the value of the denominator minus one of the BRM ratio (see
Bits 15–0
Section 27.5.8). Updating this register using byte accesses is not recommended and undefined.
27-46
UART1 BRM Modulator Register
UART2 BRM Modulator Register
28
27
26
25
24
r
r
r
r
0
0
0
0
12
11
10
9
rw
rw
rw
rw
rw
0
0
0
0
MC9328MX1 Reference Manual
23
22
21
r
r
r
r
0
0
0
0
0x0000
8
7
6
5
MOD
rw
rw
rw
0
0
0
0
0x0000
Description
Addr
0x002060A8
0x002070A8
20
19
18
17
r
r
r
r
0
0
0
0
4
3
2
1
rw
rw
rw
rw
0
0
0
0
MOTOROLA
16
r
0
0
rw
0

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