Csi Statistic Fifo Register 1; Table 31-8 Csi Statistic Fifo Register 1 Description - Motorola DragonBall MC9328MX1 Reference Manual

Table 31-7. CSI Status Register 1 Description (Continued)
Name
Reserved Reserved—These bits are reserved and should read 0.
Bits 15–1
DRDY Data Ready—Indicates that there is data ready to
Bit 0 be read out of the RxFIFO. When set, at least one
data word is ready in RxFIFO.

31.5.4 CSI Statistic FIFO Register 1

The read-only CSI Statistic FIFO Register 1 contains statistic data. Writing to this register has no effect.
CSISTATR
BIT 31 30 29
TYPE r r r
0 0 0
RESET
BIT 15 14 13
TYPE r r r
0 0 0
RESET
Name
STAT Statistic Data—Contains the statistic data. For more details refer to Section 31.6.4, "Packing of
Bits 31–0 Statistic Data," on page 31-15.
MOTOROLA
Description
CSI Statistic FIFO Register 1
28 27 26 25
r r r
0 0 0
12 11 10
r r r
0 0 0
Table 31-8. CSI Statistic FIFO Register 1 Description
CMOS Sensor Interface Module
0 = No data word is ready in the RxFIFO
1 = At least one data word is ready in the
RxFIFO
24 23 22 21
STAT
r r r r r
0 0 0 0 0
0x0000
9 8 7 6 5
STAT
r r r r r
0 0 0 0 0
0x0000
Description
Programming Model
Settings
Addr
0x0022400C
20 19 18 17
r r r r
0 0 0 0
4 3 2 1
r r r r
0 0 0 0
31-11
16
r
0
0
r
0