Mmc/Sd Read Time-Out Register; Table 20-9 Mmc/Sd Response Time-Out Register Description; Table 20-10 Mmc/Sd Read Time-Out Register Description - Motorola DragonBall MC9328MX1 Reference Manual

Multimedia Card/Secure Digital Host Controller Module (MMC/SD)
Table 20-9. MMC/SD Response Time-Out Register Description
Name
Reserved
Bits 31–8
RESPONSE TIME OUT
Bits 7–0

20.6.6 MMC/SD Read Time-Out Register

The MMC/SD Read Time-Out Register defines the time-out error for received data.
READ_TO
BIT 31 30 29
TYPE r r r
0 0 0
RESET
BIT 15 14 13
TYPE rw rw rw
1 1 1
RESET
Table 20-10. MMC/SD Read Time-Out Register Description
Name
Reserved
Bits 31–16
DATA READ TIME OUT
Bits 15–0
20-22
Description
Reserved—These bits are reserved and should read 0.
Response Time-Out—Specifies the number of clock
counts between the command and when the MMC/SD
module turns on the time-out error for the received
response.
MMC/SD Read Time-Out Register
28 27 26 25
r r r r
0 0 0 0
12 11 10 9
DATA READ TIME OUT
rw rw rw rw
1 1 1 1
Reserved—These bits are reserved and should read 0.
Received Data Time-Out—Specifies the number of clocks between the command and
when the MMC/SD module turns on the time-out error for the received data. The unit is
CLK_20M ÷ 256. A value of 0x2DB4 is recommended.
MC9328MX1 Reference Manual
24 23 22 21 20
r r r r
0 0 0 0 0
0x0000
8 7 6 5 4
rw rw rw rw rw
1 1 1 1 1
0xFFFF
Description
Settings
0x01 = 1 clock counts
...
0xFF = 255 clock counts
Addr
0x00214014
19 18 17 16
r r r r
0 0 0
3 2 1
rw rw rw rw
1 1 1
MOTOROLA
r
0
0
1