Auto-Refresh Mode (Smode = 010); Figure 24-18 Precharge Bank Timing Diagram; Figure 24-19 Precharge All Timing Diagram - Motorola DragonBall MC9328MX1 Reference Manual

SDRAM Memory Controller
whether a single bank, or all banks, are precharged by the command. (See Figure 24-18). Accessing an
address with the SDRAM address A10 low will precharge only the bank selected by the bank address.
Conversely, accesses with A10 high will precharge all banks regardless of the bank address. Note that A10
is the SDRAM pin, not the ARM920T processor's address. Translation of the SDRAM A10 address bit to
the corresponding ARM920T processor's address is dependent on the memory configuration. The
precharge command access is two clocks in length on the AHB, and one cycle to the SDRAM controller.
SDCLK
ADDR
RAS,
CAS,
SDWE
CSDx
DATA
SDCLK
ADDR
RAS,
CAS,
SDWE
CSDx
DATA

24.6.4 Auto-Refresh Mode (SMODE = 010)

The Auto-Refresh Mode (SMODE = 010) is used to manually request SDRAM refresh cycles. It is
normally used only during device initialization because the SDRAM Controller will automatically
generate refresh cycles when properly configured. The auto-refresh command refreshes all banks in the
device, so the address supplied during the refresh command only needs to specify the correct SDRAM
device. The lower address lines are ignored. Either a read or write cycle may be used. If a write is used, the
data will be ignored and the external data bus will not be driven. The cycle will be 2 clocks on the AHB
and a single clock to the SDRAM device.
24-24
SDRAMx,
with A10-0
PRE
Figure 24-18. Precharge Bank Timing Diagram
SDRAMx
with A10 = 1
PRE
Figure 24-19. Precharge All Timing Diagram
MC9328MX1 Reference Manual
t Min applies only to same bank.
RP
NOP NOP NOP
t Min
RP
NOP NOP
SDRAMx
Row
ACT
SDRAMx
Row
NOP ACT
MOTOROLA