Tone Mode; Programming Model; Pwm Control Register; Table 22-2 Pwm Module Register Memory Map - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
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Digital sample values are loaded into the pulse-width modulator as 16-bit words (big endian format). A
4-word FIFO minimizes interrupt overhead. A maskable interrupt is generated when there are 1 or 0 words
in the FIFO, in which case the software can write two 16-bit samples into the FIFO. Interrupts occur every
50 µs, if the REPEAT field of the PWMC register is set to 0, when a 16 kHz sampling frequency is being
used to play back sampled data, when writing two 16-bit data at each interrupt.

22.3.2 Tone Mode

When the value stored in the PWMP register < 0xFFFE, the PWM operates in tone mode and generates a
continuous tone at a single frequency which is determined by the settings in the PWM registers.
22.3.3 Digital-to-Analog Converter (D/A) Mode
The pulse-width modulator outputs a frequency with a different pulse width if a low-pass filter is added at
the PWMO signal. It produces a different DC level when programmed using the sample fields in the PWM
sample (PWMS) register. When used in this manner, the PWM becomes a D/A converter.

22.4 Programming Model

The PWM module includes 4 user-accessible 32-bit registers. Table 22-2 summarizes these registers and
their addresses.

22.4.1 PWM Control Register

The PWM Control Register controls the operation of the pulse-width modulator, and it also contains the
status of the PWM FIFO. The register bit assignments are shown in the following register display. The
register settings are described in Table 22-3 on page 22-4.
MOTOROLA
Table 22-2. PWM Module Register Memory Map
Description
PWM Control Register
PWM Sample Register
PWM Period Register
PWM Counter Register
Pulse-Width Modulator (PWM)
Name
Address
PWMC
0x00208000
PWMS
0x00208004
PWMP
0x00208008
PWMCNT
0x0020800C
Programming Model
22-3

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