32.5.1 Data Direction Registers
The data direction registers specify whether each pin of the port is an input or an output pin.
There are four distinct Data Direction Registers; each holds the data for one of the four GPIO ports (Port
A, Port B, Port C, and Port D).
DDIR_A
DDIR_B
DDIR_C
DDIR_D
BIT
31
30
29
TYPE
rw
rw
rw
0
0
0
RESET
BIT
15
14
13
TYPE
rw
rw
rw
0
0
0
RESET
Name
DDIR [i]
Data Direction—Controls the direction of the pins.
Bits 31–0
MOTOROLA
Port A Data Direction Register
Port B Data Direction Register
Port C Data Direction Register
Port D Data Direction Register
28
27
26
25
rw
rw
rw
rw
0
0
0
0
12
11
10
9
rw
rw
rw
rw
0
0
0
0
Table 32-5. Data Direction Registers Description
Description
GPIO Module and I/O Multiplexer (IOMUX)
24
23
22
21
DDIR
rw
rw
rw
rw
0
0
0
0
0x0000
8
7
6
5
DDIR
rw
rw
rw
rw
0
0
0
0
0x0000
0 = Pin [i] is an input
1 = Pin [i] is an output
Programming Model
Addr
0x0021C000
0x0021C100
0x0021C200
0x0021C300
20
19
18
17
rw
rw
rw
rw
0
0
0
0
4
3
2
1
rw
rw
rw
rw
0
0
0
0
Settings
32-9
16
rw
0
0
rw
0