Dma Control Registers - Motorola DragonBall MC9328MX1 Reference Manual

Serial Peripheral Interface Modules (SPI 1 and SPI 2)

18.3.7 DMA Control Registers

The SPI DMA control registers allow the user to enable DMA requests when the FIFOs are full, empty, or
half-full. These registers also contain status bits for FIFO full, empty, and half-empty conditions.
DMAREG1
DMAREG2
BIT 31 30
TYPE r r
0 0
RESET
BIT 15 14
THDEN TEDEN RFDEN RHDEN
TYPE rw rw
0 0
RESET
Table 18-10. SPI 1 DMA Control Register and SPI 2 DMA Control Register Description
Name
Reserved Reserved—These bits are reserved and should read 0.
Bits 31–16
THDEN THDEN—Enables/Disables the TXFIFO Half
Bit 15 DMA Request.
TEDEN TEDEN—Enables/Disables the TXFIFO
Bit 14 Empty DMA Request.
RFDEN RFDEN—Enables/Disables the RXFIFO Full
Bit 13 DMA Request.
RHDEN RHDEN—Enables/Disables the RXFIFO Half
Bit 12 DMA Request.
Reserved Reserved—These bits are reserved and should read 0.
Bits 11–8
THDMA TXFIFO Half Status—Indicates when the
Bit 7 transmit FIFO is half-empty.
TEDMA TXFIFO Empty Status—Indicates when the
Bit 6 transmit FIFO is empty.
RFDMA RXFIFO Full Status—Indicates when the
Bit 5 receive FIFO is full.
18-14
SPI 1 DMA Control Register
SPI 2 DMA Control Register
29 28 27 26 25
r r r r r
0 0 0 0 0
13 12 11 10 9
rw rw r r r
0 0 0 0 0
Description
MC9328MX1 Reference Manual
24 23 22 21
r r r r
0 0 0 0
0x0000
8 7 6 5
THDMA TEDMA RFDMA RHDMA
r r r r
0 0 0 0
0x0000
0 = Disabled
1 = Enabled
0 = Disabled
1 = Enabled
0 = Disabled
1 = Enabled
0 = Disabled
1 = Enabled
0 = There are less than 4 empty slots in the TXFIFO
1 = There are at least 4 empty slots in the TXFIFO
0 = There is at least one data word in the TXFIFO
1 = The TXFIFO is empty, however data shifting
may still be on-going. To be sure no data
transaction is on-going, read the XCH bit in the
Control Registers.
0 = There are less than 8 data words in the RXFIFO
1 = There are 8 data words in the RXFIFO
Addr
0x00213018
0x00219018
20 19 18 17 16
r r r r
0 0 0 0 0
4 3 2 1 0
r r r r
0 0 0 0 0
Settings
MOTOROLA
r
r