Pen A/D Sample Rate Control Register; Table 15-8 Pen A/D Sample Rate Control Register Description - Motorola DragonBall MC9328MX1 Reference Manual

Name
PADE Pen A/D Enable—Enables/Disables the Pen A/D
Bit 1 Controller. This bit must be set after all other control bits are
set. After this bit is set, A/D starts sampling. This bit must be
cleared by software when the touch penal is in idle state for
power saving
this bit is clear, it flushes the Pen Sample FIFO.
BGE Voltage Reference Enable—Enables/Disables the voltage
Bit 0 reference circuit.

15.5.2 Pen A/D Sample Rate Control Register

The Pen A/D Sample Rate Control Register selects the sampling rate for touch pen input. Each application
may require different pen input sampling rates. The maximum A/D sampling rate is limited by the A/D
design and the input signal data setup time. The design is targeted to support up to a 200 Hz data rate for
each input signal. The user must set the data setup time and idle time for power saving.
ASP_PSMPLRG
BIT 31 30 29
TYPE r r r
0 0 0
RESET
BIT 15 14 13
DMCNT
TYPE r rw rw
0 0 0
RESET
Table 15-8. Pen A/D Sample Rate Control Register Description
Name
Reserved Reserved—These bits are reserved and should read 0.
Bits 31–15
DMCNT Decimation Ratio Count—Controls the
Bits 14–12 decimation ratio of the second-stage FIR. Input
clock to this counter is fclk.
MOTOROLA
Table 15-7. Control Register Description (Continued)
Description
—
that is, waiting for a pen interrupt. When
Pen A/D Sample Rate Control Register
28 27 26 25
r r r
0 0 0
12 11 10
BIT_SELECT
rw rw rw rw
0 0 0
Description
Analog Signal Processor (ASP)
24 23 22 21
r r r r r
0 0 0 0 0
0X0000
9 8 7 6 5
IDLECNT
rw rw rw rw
0 0 0 0 0
0X0000
000 = Decimation ratio is 1
001 = Decimation ratio is 2
010 = Decimation ratio is 3
011 = Decimation ratio is 4
100 = Decimation ratio is 5
101 = Decimation ratio is 6
110 = Decimation ratio is 7
111 = Decimation ratio is 8
Programming Model
Settings
0 = Pen A/D disabled
1 = Pen A/D enabled
0 = Disable Voltage Ref
1 = Enable Voltage Ref
0x00215014
20 19 18 17
r r r r
0 0 0 0
4 3 2 1
DSCNT
rw rw rw rw
0 0 0 0
Settings
Addr
16
r
0
0
rw
0
15-11