Ssi Fifo Control/Status Register; Table 30-19 Ssi Fifo Control/Status Register Description - Motorola DragonBall MC9328MX1 Reference Manual

30.3.12 SSI FIFO Control/Status Register

The SSI FIFO Control/Status Register (SFCSR) tracks the number of data words held in the transmit and
receive FIFOs and holds the Water Mark levels for each FIFO. The Water Mark is a user-defined value
that determines when the RFF and TFE bits in the SCSR are set.
SFCSR
BIT 31 30 29
TYPE r r r
0 0 0
RESET
BIT 15 14 13
RFCNT
TYPE r r r
0 0 0
RESET
Table 30-19. SSI FIFO Control/Status Register Description
Name Description
Reserved Reserved—These bits are reserved and should read 0.
Bits 31–16
RFCNT Receive FIFO
Bits 15–12 Counter—Indicates
how many data words
are in the receive
FIFO. This count does
not include words that
are being received or
were received into the
RXSR, yet not
transferred to the
receive FIFO.
TFCNT Transmit FIFO
Bits 11–8 Counter—Indicates
how many data words
are in the transmit
FIFO. This count does
not include words that
were transferred to the
TXSR.
MOTOROLA
SSI FIFO Control/Status Register
28 27 26 25
r r r r
0 0 0 0
12 11 10 9
TFCNT
r r r r
0 0 0 0
0000 = 0 data words in the receive FIFO
0001 = 1 data word in the receive FIFO
0010 = 2 data words in the receive FIFO
0011 = 3 data words in the receive FIFO
0100 = 4 data words in the receive FIFO
0101 = 5 data words in the receive FIFO
0110 = 6 data words in the receive FIFO
0111 = 7 data words in the receive FIFO
1000 = 8 data words in the receive FIFO
All other settings reserved
0000 = 0 data words in the transmit FIFO
0001 = 1 data word in the transmit FIFO
0010 = 2 data words in the transmit FIFO
0011 = 3 data words in the transmit FIFO
0100 = 4 data words in the transmit FIFO
0101 = 5 data words in the transmit FIFO
0110 = 6 data words in the transmit FIFO
0111 = 7 data words in the transmit FIFO
1000 = 8 data words in the transmit FIFO
All other settings reserved
Synchronous Serial Interface (SSI)
24 23 22 21 20
r r r r
0 0 0 0 0
0x0000
8 7 6 5 4
RFWM
r rw rw rw rw
0 1 0 0 0
0X0081
Settings
Programming Model
Addr
0x00218020
19 18 17 16
r r r r
0 0 0
3 2 1
TFWM
rw rw rw rw
0 0 0
30-31
r
0
0
1