Motorola DragonBall MC9328MX1 Reference Manual page 949

Integrated portable system processor
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ESTIMATED_COUNT register
ESTIMATED_COUNT, 16-32
ESTIMATED_COUNT register, 16-32
ETC bit, 25-28
ETCIM bit, 25-31
ETM
block diagram, 5-1
introduction, 5-1
pin configuration, 5-2
registers, programming and reading, 5-2
EXR bit, 6-4
External interface module, see EIM module
External reset bit, see EXR bit
F
Fast interrupt
arbiter disable, see FIAD bit
pending bit, see FIPEND field
pending register high, see FIPNDH register
pending register low, see FIPNDL register
vector and status register, see FIVECSR register
vector, see FIVECTOR field
Fast interrupt pending bit, see FIPEND field
FE bit, 25-33
FIFO REGISTER bits, 17-12
FIFO COUNT bits, 17-13
FIFO EMP bit, 17-27
,
FIFO EMPT bit, 17-11
17-12
,
FIFO FULL bit, 17-11
17-12
,
FIFO HALF bit, 17-11
17-12
,
FIPEND field, 10-32
10-33
FIPNDH register, 10-32
FIPNDL register, 10-33
FIVECSR register, 10-25
FIVECTOR field, 10-25
FLUSH_RCV bit, 25-38
FLUSH_XMTbit, 25-38
FMCR register
EXT_BR_EN bit, 8-4
SDCS0_SEL bit, 8-4
SDCS1_SEL bit, 8-4
SSI_RXCLK_SEL bit, 8-3
SSI_RXDAT_SEL bit, 8-3
SSI_RXFS_SEL bit, 8-3
SSI_TXCLK_SEL bit, 8-3
SSI_TXFS_SEL bit, 8-3
FMCR register, 8-3
,
FORCE field, 10-28
10-29
Four bits/pixel grayscale mode
GPM field, 19-37
Free-run/restart, see FRR bit
Frequency hopping registers, 16-81
FRR bit, 26-4
MOTOROLA
,
17-13
,
,
17-13
17-27
,
17-13
MC9328MX1 Reference Manual
Function multiplexing control register,
see FMCR register
G
General purpose counter clock select, see
GPCNT_CLK_SEL bit
General purpose counter flag, see GPCNT bit,
General purpose counter interrupt mask,
see GPCNTM bit
General purpose counter register
SIM, see GPCNT register
General purpose timers
programming model, 26-3
GETU field, 25-36
GIUS_A register, 32-17
GIUS_B register, 32-17
GIUS_C register, 32-17
GIUS_D register, 32-17
GIUS_x register
GIUS field, 32-17
Global peripheral control register, see GPCR register
GPCNT bit, 25-27
GPCNT field, 25-40
GPCNT register, 25-40
GPCNT_CLK_SEL field, 25-24
GPCNTM bit, 25-31
GPCR register
BTAEN bit, 8-5
DS_ADDR field, 8-5
DS_CNTL field, 8-5
DS_DATA field, 8-5
DS_SLOW field, 8-5
MMA_PROT_EN bit, 8-5
GPCR register, 8-4
GPIO
data direction registers, 32-9
data registers, 32-16
general description, 32-1
general purpose registers, 32-23
in use registers, 32-17
Input configuration registers, 32-12
interrupt configuration registers, 32-19
interrupt mask registers, 32-21
interrupt status registers, 32-22
interrupts, 32-3
module block diagram, 32-4
module features, 32-2
module overview, 32-2
output configuration registers, 32-10
pin configuration, 32-4
programming model, 32-5
pull_up enable registers, 32-25
sample status registers, 32-18
Index-vii

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