Device Configuration 7 (Dc7) Register; Master Subsystem Configuration (Mcnf) Register; Device Configuration 7 (Dc7) Register Field Descriptions; Master Subsystem Configuration (Mcnf) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

System Control Registers
Table 1-45. Device Configuration 10 (DC10) Register Field Descriptions (continued)
Bit Field
0 UART4

1.13.2.8 Device Configuration 7 (DC7) Register

This register can be used to verify µDMA channel features. A "1" indicates that the channel is available on
this device. In this device all the 32 channels of µDMA are available in all device configurations.
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 1-46. Device Configuration 7 (DC7) Register Field Descriptions
Bit Field
31-0 DMACH

1.13.2.9 Master Subsystem Configuration (MCNF) Register

The Master Subsystem Configuration (MCNF) register is shown and described in the figure and table
below.
31
15
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset; x= indeterminate
Table 1-47. Master Subsystem Configuration (MCNF) Register Field Descriptions
Bit Field
31-9 Reserved
8 µCRC
7-3 Reserved
2-0 FLASH
180
System Control and Interrupts
Value Description
UART4
Whether UART4 is present or not depends on the device configuration.
UART4 is not present
UART4 is present
Figure 1-35. Device Configuration 7 (DC7) Register
R-0xFFFFFFFF
Value Description
DMA Channel Present
All the DMA channels [31:0] of the µDMA are available in this device.
Figure 1-36. Master Subsystem Configuration (MCNF) Register
9
Value Description
Reserved
µCRC Configuration
0 µCRC is disabled
1 µCRC is present
Reserved
M3 Flash Size Configuration
111 512KB
110 256KB
Copyright © 2012–2019, Texas Instruments Incorporated
DMACH
Reserved
R-0
8 7
µCRC Reserved
R-x R-0
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
0
16
3 2 0
FLASH
R-x
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