Table Of Contents - Texas Instruments SimpleLink CC2620 Technical Reference Manual

Revision History: SWCU117C
Revision History: SWCU117B
Revision History: SWCU117A
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Preface
1 Architectural Overview
1.1 Target Applications
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1.2 Overview
1.3 Functional Overview
1.3.1 Arm Cortex-M3
1.3.2 On-Chip Memory
1.3.3 Radio
1.3.4 Advanced Encryption Standard (AES) Engine With 128-bit Key Support
1.3.5 General-Purpose Timers
1.3.6 Direct Memory Access
1.3.7 System Control And Clock
1.3.8 Serial Communication Peripherals
1.3.9 Programmable I/Os
1.3.10 Sensor Controller
1.3.11 Random Number Generator
1.3.12 cJTAG and JTAG
1.3.13 Power Supply System
2 The Cortex-M3 Processor
2.1 The Cortex-M3 Processor Introduction
2.2 Block Diagram
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2.3 Overview
2.3.1 System-level Interface
2.3.2 Integrated Configurable Debug
2.3.3 Trace Port Interface Unit
2.3.4 Cortex-M3 System Component Details
2.4 Programming Model
2.4.1 Processor Mode and Privilege Levels for Software Execution
2.4.2 Stacks
2.4.3 Exceptions And Interrupts
2.4.4 Data Types
2.5 Cortex-M3 Core Registers
2.5.1 Core Register Map
2.5.2 Core Register Descriptions
2.6 Instruction Set Summary
2.7 Cortex-M3 Processor Registers
2.7.1 CPU_DWT Registers
2.7.2 CPU_FPB Registers
2.7.3 CPU_ITM Registers
2.7.4 CPU_SCS Registers
2.7.5 CPU_TPIU Registers
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Copyright © 2015, Texas Instruments Incorporated
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SWCU117C – February 2015 – Revised September 2015
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