Texas Instruments SimpleLink CC2620 Technical Reference Manual page 49

www.ti.com
Mnemonic
MLA
MLS
MOV, MOVS
MOV, MOVW
MOVT
MRS
MSR
MUL, MULS
MVN, MVNS
NOP
ORN, ORNS
ORR, ORRS
POP
PUSH
RBIT
REV
REV16
REVSH
ROR, RORS
RRX, RRXS
RSB, RSBS
SBC, SBCS
SBFX
SDIV
SEV
SMLAL
SMULL
SSAT
STM
STMDB, STMEA
STMFD, STMIA
STR
STRB, STRBT
STRD
STREX
STREXB
STREXH
STRH, STRHT
STRSB, STRSBT
STRSH, STRSHT
STRT
SUB, SUBS
SUB, SUBW
SVC
SWCU117C – February 2015 – Revised September 2015
Submit Documentation Feedback
Table 2-25. Cortex-M3 Instruction Summary (continued)
Operands
Rd, Rn, Rm, Ra
Rd, Rn, Rm, Ra
Rd, Op2
Rd, #imm16
Rd, #imm16
Rd, spec_reg
spec_reg, Rm
{Rd,} Rn, Rm
Rd, Op2
–
{Rd,} Rn, Op2
{Rd,} Rn, Op2
reglist
reglist
Rd, Rn
Rd, Rn
Rd, Rn
Rd, Rn
Rd, Rm, <Rs|#n>
Rd, Rm
{Rd,} Rn, Op2
{Rd,} Rn, Op2
Rd, Rn, #lsb, #width
{Rd,} Rn, Rm
–
RdLo, RdHi, Rn, Rm
RdLo, RdHi, Rn, Rm
Rd, #n, Rm {,shift #s}
Rn{!}, reglist
Rn{!}, reglist
Rn{!}, reglist
Rt, [Rn {, #offset}]
Rt, [Rn {, #offset}]
Rt, Rt2, [Rn {, #offset}]
Rt, Rt, [Rn {, #offset}]
Rd, Rt, [Rn]
Rd, Rt, [Rn]
Rt, [Rn {, #offset}]
Rt, [Rn {, #offset}]
Rt, [Rn {, #offset}]
Rt, [Rn {, #offset}]
{Rd,} Rn, Op2
{Rd,} Rn, #imm12
#imm
Copyright © 2015, Texas Instruments Incorporated
Brief Description
Multiply with accumulate, 32-bit result
Multiply and subtract, 32-bit result
Move
Move 16-bit constant
Move top
Move from special register to general
register
Move from general register to special
register
Multiply, 32-bit result
Move NOT
No operation
Logical OR NOT
Logical OR
Pop registers from stack
Push registers onto stack
Reverse bits
Reverse byte order in a word
Reverse byte order in each halfword
Reverse byte order in bottom halfword
and sign extend
Rotate right
Rotate right with extend
Reverse subtract
Subtract with carry
Signed bit field extract
Signed divide
Send event
Signed multiply with accumulate (32 ×
32 + 64), 64-bit result
Signed multiply (32 × 32), 64-bit result
Signed saturate
Store multiple registers, increment after
Store multiple registers, decrement
before
Store multiple registers, increment after
Store register word
Store register byte
Store register two words
Store register exclusive
Store register exclusive byte
Store register exclusive halfword
Store register halfword
Store register signed byte
Store register signed halfword
Store register word
Subtract
Subtract 12-bit constant
Supervisor call
Instruction Set Summary
Flags
–
–
N, Z, C
N, Z, C
–
–
N, Z, C, V
N, Z
N, Z, C
–
N, Z, C
N, Z, C
–
–
–
–
–
–
N, Z, C
N, Z, C
N, Z, C, V
N, Z, C, V
–
–
–
–
–
Q
–
–
–
–
–
–
–
–
–
–
–
–
–
N, Z, C, V
N, Z, C, V
–
49