Texas Instruments SimpleLink CC2620 Technical Reference Manual page 454

PRCM Registers
Table 6-27. RESETCTL Register Field Descriptions (continued)
Bit Field
14 GPIO_WU_FROM_SD
13 BOOT_DET_1
12 BOOT_DET_0
11 VDDS_LOSS_EN_OVR
10 VDDR_LOSS_EN_OVR
9 VDD_LOSS_EN_OVR
8 RESERVED
7 VDDS_LOSS_EN
6 VDDR_LOSS_EN
5 VDD_LOSS_EN
4 CLK_LOSS_EN
454
Power, Reset, and Clock Management
Type Reset Description
R 0h A wakeup from SHUTDOWN on an IO event has occurred
Please refer to [IOC:IOCFGn,.WU_CFG] for configuring the IO's as
wakeup sources.
0: The wakeup did not occur from SHUTDOWN on an IO event
1: A wakeup from SHUTDOWN occurred from an IO event
The case where WU_FROM_SD is asserted but this bitfield is not
asserted will only occur in a debug session. The boot code will not
proceed with wakeup from SHUTDOWN procedure until this bitfield
is asserted as well.
Note: This flag can not be cleared and will therefor remain valid untill
poweroff/reset
R 0h
Internal. Only to be used through TI provided API.
R 0h
Internal. Only to be used through TI provided API.
R/W 0h Override of VDDS_LOSS_EN
0: Brown out detect of VDDS is ignored, unless VDDS_LOSS_EN=1
1: Brown out detect of VDDS generates system reset (regardless of
VDDS_LOSS_EN)
This bit can be locked
R/W 0h Override of VDDR_LOSS_EN
0: Brown out detect of VDDR is ignored, unless VDDR_LOSS_EN=1
1: Brown out detect of VDDR generates system reset (regardless of
VDDR_LOSS_EN)
This bit can be locked
R/W 0h Override of VDD_LOSS_EN
0: Brown out detect of VDD is ignored, unless VDD_LOSS_EN=1
1: Brown out detect of VDD generates system reset (regardless of
VDD_LOSS_EN)
This bit can be locked
R 0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
R/W 1h Controls reset generation in case VDDS is lost
0: Brown out detect of VDDS is ignored, unless
VDDS_LOSS_EN_OVR=1
1: Brown out detect of VDDS generates system reset
R/W 1h Controls reset generation in case VDDR is lost
0: Brown out detect of VDDR is ignored, unless
VDDR_LOSS_EN_OVR=1
1: Brown out detect of VDDR generates system reset
R/W 1h Controls reset generation in case VDD is lost
0: Brown out detect of VDD is ignored, unless
VDD_LOSS_EN_OVR=1
1: Brown out detect of VDD generates system reset
R/W 0h Controls reset generation in case SCLK_LF is lost. (provided that
clock loss detection is enabled by
DDI_0_OSC:CTL0.CLK_LOSS_EN)
Note: Clock loss reset generation must be disabled before SCLK_LF
clock source is changed in DDI_0_OSC:CTL0.SCLK_LF_SRC_SEL
and remain disabled untill the change is confirmed in
DDI_0_OSC:STAT0.SCLK_LF_SRC. Failure to do so may result in a
spurious system reset. Clock loss reset generation can be disabled
through this bitfield or by clearing
DDI_0_OSC:CTL0.CLK_LOSS_EN
0: Clock loss is ignored
1: Clock loss generates system reset
Copyright © 2015, Texas Instruments Incorporated
SWCU117C – February 2015 – Revised September 2015
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