Texas Instruments SimpleLink CC2620 Technical Reference Manual page 56

Cortex-M3 Processor Registers
2.7.1.4 EXCCNT Register (Offset = Ch) [reset = X]
EXCCNT is shown in
Exception Overhead Count
This register is used to count the total cycles spent in interrupt processing.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-8 RESERVED
7-0 EXCCNT
56
Figure 2-7 and described in
Figure 2-7. EXCCNT Register
RESERVED
R/W-0h
Table 2-30. EXCCNT Register Field Descriptions
Type Reset
R/W 0h
R/W X
Copyright © 2015, Texas Instruments Incorporated
Table 2-30.
9
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Current interrupt overhead counter value. Counts the total cycles
spent in interrupt processing (for example entry stacking, return
unstacking, pre-emption). An event is emitted on counter overflow
(every 256 cycles). This counter initializes to 0 when it is enabled
using CTRL.EXCEVTENA.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
8 7 6 5 4 3 2 1
EXCCNT
R/W-X
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