Texas Instruments SimpleLink CC2620 Technical Reference Manual page 48

Instruction Set Summary
NOTE: Table 2-25
Changes made in the manual must be made in
Mnemonic
ADC, ADCS
ADD, ADDS
ADD, ADDW
ADR
AND, ANDS
ASR, ASRS
B
BFC
BFI
BIC, BICS
BKPT
BL
BLX
BX
CBNZ
CBZ
CLREX
CLZ
CMN
CMP
CPSID
CPSIE
DMB
DSB
EOR, EORS
ISB
IT
LDM
LDMDB, LDMEA
LDMFD, LDMIA
LDR
LDRB, LDRBT
LDRD
LDREX
LDREXB
LDREXH
LDRH, LDRHT
LDRSB, LDRSBT
LDRSH, LDRSHT
LDRT
LSL, LSLS
LSR, LSRS
48
is copied from the Cortex™-M3 Instruction Set Technical User's Manual.
Table 2-25. Cortex-M3 Instruction Summary
Operands
{Rd,} Rn, Op2
{Rd,} Rn, Op2
{Rd,} Rn , #imm12
Rd, label
{Rd,} Rn, Op2
Rd, Rm, <Rs|#n>
label
Rd, #lsb, #width
Rd, Rn, #lsb, #width
{Rd,} Rn, Op2
#imm
label
Rm
Rm
Rn, label
Rn, label
–
Rd, Rm
Rn, Op2
Rn, Op2
I
I
–
–
{Rd,} Rn, Op2
–
–
Rn{!}, reglist
Rn{!}, reglist
Rn{!}, reglist
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rt, Rt2, [Rn, #offset]
Rt, [Rn, #offset]
Rt, [Rn]
Rt, [Rn]
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rd, Rm, <Rs|#n>
Rd, Rm, <Rs|#n>
Copyright © 2015, Texas Instruments Incorporated
Table 2-25.
Brief Description
Add with carry
Add
Add
Load PC-relative address
Logical AND
Arithmetic shift right
Branch
Bit field clear
Bit field insert
Bit clear
Breakpoint
Branch with link
Branch indirect with link
Branch indirect
Compare and branch if nonzero
Compare and branch if zero
Clear exclusive
Count leading zeros
Compare negative
Compare
Change processor state, disable
interrupts
Change processor state, enable
interrupts
Data memory barrier
Data synchronization barrier
Exclusive OR
Instruction synchronization barrier
If‑Then condition block
Load multiple registers, increment after
Load multiple registers, decrement
before
Load multiple registers, increment after
Load register with word
Load register with byte
Load register with 2 bytes
Load register exclusive
Load register exclusive with byte
Load register exclusive with halfword
Load register with halfword
Load register with signed byte
Load register with signed halfword
Load register with word
Logical shift left
Logical shift right
SWCU117C – February 2015 – Revised September 2015
www.ti.com
Flags
N, Z, C, V
N, Z, C, V
N, Z, C, V
–
N, Z, C
N, Z, C
–
–
–
N, Z, C
–
–
–
–
–
–
–
–
N, Z, C, V
N, Z, C, V
–
–
–
–
N, Z, C
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
N, Z, C
N, Z, C
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