Texas Instruments SimpleLink CC2620 Technical Reference Manual page 808

AES Cryptoprocessor Overview
10.1.4.4 Master Control and Select
The master control module synchronizes the DMA operations and the cryptographic module handshake
signals. In this module, the crypto algorithm is selected and the DMA burst sizes are defined. When the
complete encryption operation completes, an interrupt is asserted.
NOTE: For authentication operations, the interrupt is asserted only if the authentication result is
available.
The AES module also provides an interrupt to indicate that the input DMA transfer is complete. This
interrupt is primarily used to determine the end of an AAD data DMA transfer (AES-CCM), which is
typically set up as separate input data transfer.
10.1.4.4.1 Algorithm Select
This algorithm-selection register configures the internal destination of the DMAC.
10.1.4.4.1.1 Algorithm Select
Table 10-3 summarizes the allowed bit combinations of the ALGSEL register.
Operation
Key store is loaded through the DMA.
AES data is loaded through the DMA and
encrypted and decrypted data are read through
the DMA (encryption and decryption) or AES
data is loaded through the DMA and result tag
is read through the slave interface
(authentication-only operations).
AES data is loaded through the DMA, result tag
is read through the DMA (authentication-only
operations).
10.1.4.4.2 Master PROT Enable
10.1.4.4.2.1 Master PROT-Privileged Access-Enable
The DMAPORTCTL register selects the AHB transfer protection control for DMA transfers, using the key
store as destination.
10.1.4.4.3 Software Reset
Refer to Section 10.1.6.4.1, Soft Reset, for more details on the soft reset procedure.
To perform a software reset of the AES module, write 1 to the RESET bit in the SWRESET register. When
the software reset completes, the RESET bit in the SWRESET register is automatically reset. Software
must ensure that the software reset completes before starting any operations.
In the DMA control module, software reset is used to reset the DMAC to stop all transfers and clear the
DMAPORTERR register. After the software reset is performed, all channels are disabled and no new
requests are performed by the channels. The DMAC waits for the existing (active) requests to finish, then
sets the DMAC status registers.
808
Cryptography
Table 10-3. Valid Combinations for ALGSEL Flags
KEY STORE
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0
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SWCU117C – February 2015 – Revised September 2015
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