Texas Instruments SimpleLink CC2620 Technical Reference Manual page 794

Factory Configuration (FCFG)
9.2.1.73 PWD_CURR_50C Register (Offset = 3A4h) [reset = 1218A20Dh]
PWD_CURR_50C is shown in
Power Down Current Control 50C
31 30 29 28
DELTA_CACHE_REF
15 14 13 12
DELTA_XOSC_LPM
Bit Field
31-24 DELTA_CACHE_REF
23-16 DELTA_RFMEM_RET
15-8 DELTA_XOSC_LPM
7-0 BASELINE
794
Device Configuration
Figure 9-95 and described in
Figure 9-95. PWD_CURR_50C Register
27 26 25
R-12h
11 10 9
R-A2h
Table 9-97. PWD_CURR_50C Register Field Descriptions
Type Reset
R 12h
R 18h
R A2h
R Dh
Copyright © 2015, Texas Instruments Incorporated
Table 9-97.
24 23 22 21
DELTA_RFMEM_RET
8 7 6 5
Description
Additional maximum current, in units of 1 µA, with cache retention
Additional maximum current, in 1 µA units, with RF memory retention
Additional maximum current, in units of 1 µA, with XOSC_HF on in
low-power mode
Worst-case baseline maximum power-down current, in units of 0.5
µA
SWCU117C – February 2015 – Revised September 2015
www.ti.com
20 19 18 17
R-18h
4 3 2 1
BASELINE
R-Dh
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