Ccfg Registers - Texas Instruments SimpleLink CC2620 Technical Reference Manual

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9.1.1 CCFG Registers

Table 9-1 lists the memory-mapped registers for the CCFG. All register offset addresses not listed in
Table 9-1 must be considered as reserved locations and the register contents must not be modified.
Offset Acronym
FA8h EXT_LF_CLK
FACh MODE_CONF_1
FB0h SIZE_AND_DIS_FLAGS
FB4h MODE_CONF
FB8h VOLT_LOAD_0
FBCh VOLT_LOAD_1
FC0h RTC_OFFSET
FC4h FREQ_OFFSET
FC8h IEEE_MAC_0
FCCh IEEE_MAC_1
FD0h IEEE_BLE_0
FD4h IEEE_BLE_1
FD8h BL_CONFIG
FDCh ERASE_CONF
FE0h CCFG_TI_OPTIONS
FE4h CCFG_TAP_DAP_0
FE8h CCFG_TAP_DAP_1
FECh IMAGE_VALID_CONF
FF0h CCFG_PROT_31_0
FF4h CCFG_PROT_63_32
FF8h CCFG_PROT_95_64
FFCh CCFG_PROT_127_96
SWCU117C – February 2015 – Revised September 2015
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Table 9-1. CCFG Registers
Register Name
Extern LF clock configuration
Mode Configuration 1
CCFG Size and Disable Flags
Mode Configuration 0
Voltage Load 0
Voltage Load 1
Real Time Clock Offset
Frequency Offset
IEEE MAC Address 0
IEEE MAC Address 1
IEEE BLE Address 0
IEEE BLE Address 1
Bootloader Configuration
Erase Configuration
TI Options
Test Access Points Enable 0
Test Access Points Enable 1
Image Valid
Protect Sectors 0-31
Protect Sectors 32-63
Protect Sectors 64-95
Protect Sectors 96-127
Copyright © 2015, Texas Instruments Incorporated
Customer Configuration (CCFG)
Section
Section 9.1.1.1
Section 9.1.1.2
Section 9.1.1.3
Section 9.1.1.4
Section 9.1.1.5
Section 9.1.1.6
Section 9.1.1.7
Section 9.1.1.8
Section 9.1.1.9
Section 9.1.1.10
Section 9.1.1.11
Section 9.1.1.12
Section 9.1.1.13
Section 9.1.1.14
Section 9.1.1.15
Section 9.1.1.16
Section 9.1.1.17
Section 9.1.1.18
Section 9.1.1.19
Section 9.1.1.20
Section 9.1.1.21
Section 9.1.1.22
Device Configuration
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