Texas Instruments SimpleLink CC2620 Technical Reference Manual page 704

Customer Configuration (CCFG)
9.1.1.14 ERASE_CONF Register (Offset = FDCh) [reset = FFFFFFFFh]
ERASE_CONF is shown in
Erase Configuration
31 30
23 22
15 14
7 6
Bit Field
31-9 RESERVED
8 CHIP_ERASE_DIS_N
7-1 RESERVED
0 BANK_ERASE_DIS_N
704
Device Configuration
Figure 9-14 and described in
Figure 9-14. ERASE_CONF Register
29 28
RESERVED
R/W-7FFFFFh
21 20
RESERVED
R/W-7FFFFFh
13 12
RESERVED
R/W-7FFFFFh
5 4
RESERVED
R/W-7Fh
Table 9-15. ERASE_CONF Register Field Descriptions
Type Reset
R/W 7FFFFFh
R/W 1h
R/W 7Fh
R/W 1h
Copyright © 2015, Texas Instruments Incorporated
Table 9-15.
27 26
19 18
11 10
3 2
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Chip erase.
This bit controls if a chip erase requested through the JTAG WUC
TAP will be ignored in a following boot caused by a reset of the MCU
VD.
A successful chip erase operation will force the content of the flash
main bank back to the state as it was when delivered by TI.
0: Disable. Any chip erase request detected during boot will be
ignored.
1: Enable. Any chip erase request detected during boot will be
performed by the boot FW.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Bank erase.
This bit controls if the ROM serial boot loader will accept a received
Bank Erase command (COMMAND_BANK_ERASE).
A successful Bank Erase operation will erase all main bank sectors
not protected by write protect configuration bits in CCFG.
0: Disable the boot loader bank erase function.
1: Enable the boot loader bank erase function.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
25 24
17 16
9 8
CHIP_ERASE_
DIS_N
R/W-1h
1 0
BANK_ERASE
_DIS_N
R/W-1h
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