Texas Instruments SimpleLink CC2620 Technical Reference Manual page 289

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4.7.2.17 CPUIRQSEL16 Register (Offset = 40h) [reset = 11h]
CPUIRQSEL16 is shown in
Output Selection for CPU Interrupt 16
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-7 RESERVED
6-0 EV
SWCU117C – February 2015 – Revised September 2015
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Figure 4-26 and described in
Figure 4-26. CPUIRQSEL16 Register
RESERVED
R-0h
Table 4-31. CPUIRQSEL16 Register Field Descriptions
Type Reset
R 0h
R 11h
Copyright © 2015, Texas Instruments Incorporated
Table 4-31.
9
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Read only selection value
11h = GPT0B interrupt event, controlled by GPT0:TBMR
Interrupts and Events Registers
8 7 6 5 4 3 2 1
EV
R-11h
Interrupts and Events
0
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