Cortex-M3 Processor Registers
2.7.5.3
ACPR Register (Offset = 10h) [reset = 0h]
ACPR is shown in
Async Clock Prescaler
This register scales the baud rate of the asynchronous output.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit
Field
31-13
RESERVED
12-0
PRESCALER
210
Figure 2-133
and described in
Figure 2-133. ACPR Register
RESERVED
R/W-0h
Table 2-160. ACPR Register Field Descriptions
Type
Reset
R/W
0h
R/W
0h
Copyright © 2015, Texas Instruments Incorporated
Table
2-160.
9
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Divisor for input trace clock is (PRESCALER + 1).
SWCU117C – February 2015 – Revised September 2015
www.ti.com
8
7
6
5
4
3
2
1
PRESCALER
R/W-0h
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