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Bit
Field
11
RETTOBASE
10-9
RESERVED
8-0
VECTACTIVE
SWCU117C – February 2015 – Revised September 2015
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Table 2-123. ICSR Register Field Descriptions (continued)
Type
Reset
R
0h
R
0h
R
0h
Copyright © 2015, Texas Instruments Incorporated
Description
Indicates whether there are preempted active exceptions:
0: There are preempted active exceptions to execute
1: There are no active exceptions, or the currently-executing
exception is the only active exception.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Active ISR number field. Reset clears this field.
Cortex-M3 Processor Registers
167