Texas Instruments SimpleLink CC2620 Technical Reference Manual page 54

Cortex-M3 Processor Registers
2.7.1.2 CYCCNT Register (Offset = 4h) [reset = 0h]
CYCCNT is shown in
Current PC Sampler Cycle Count
This register is used to count the number of core cycles. This counter can measure elapsed execution
time. This is a free-running counter (this counter will not advance in power modes where free-running
clock to CPU stops). The counter has three functions:
1: When CTRL.PCSAMPLEENA = 1, the PC is sampled and emitted when the selected tapped bit
changes value (0 to 1 or 1 to 0) and any post-scalar value counts to 0.
2: When CTRL.CYCEVTENA = 1 , (and CTRL.PCSAMPLEENA = 0), an event is emitted when the
selected tapped bit changes value (0 to 1 or 1 to 0) and any post-scalar value counts to 0.
3: Applications and debuggers can use the counter to measure elapsed execution time. By subtracting a
start and an end time, an application can measure time between in-core clocks (other than when Halted in
debug). This is valid to 2
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 CYCCNT
54
Figure 2-5 and described in
32
core clock cycles (for example, almost 89.5 seconds at 48MHz).
Figure 2-5. CYCCNT Register
CYCCNT
R/W-0h
Table 2-28. CYCCNT Register Field Descriptions
Type Reset
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 2-28.
9
Description
Current PC Sampler Cycle Counter count value. When enabled, this
counter counts the number of core cycles, except when the core is
halted. The cycle counter is a free running counter, counting
upwards (this counter will not advance in power modes where free-
running clock to CPU stops). It wraps around to 0 on overflow. The
debugger must initialize this to 0 when first enabling.
SWCU117C – February 2015 – Revised September 2015
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