Texas Instruments SimpleLink CC2620 Technical Reference Manual page 461

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6.2.3.4 AUXCFG Register (Offset = Ch) [reset = 1h]
AUXCFG is shown in
AUX Configuration
This register contains power management related signals for the AUX domain.
31 30
23 22
15 14
7 6
Bit Field
31-1 RESERVED
0 RAM_RET_EN
SWCU117C – February 2015 – Revised September 2015
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Figure 6-29 and described in
Figure 6-29. AUXCFG Register
29 28
RESERVED
R/W-0h
21 20
RESERVED
R/W-0h
13 12
RESERVED
R/W-0h
5 4
RESERVED
R/W-0h
Table 6-33. AUXCFG Register Field Descriptions
Type Reset
R/W 0h
R/W 1h
Copyright © 2015, Texas Instruments Incorporated
Table 6-33.
27 26
19 18
11 10
3 2
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
This bit controls retention mode for the AUX_RAM:BANK0:
0: Retention is disabled
1: Retention is enabled
NB: If retention is disabled, the AUX_RAM will be powered off when
it would otherwise be put in retention mode
Power, Reset, and Clock Management
PRCM Registers
25 24
17 16
9 8
1 0
RAM_RET_EN
R/W-1h
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