Texas Instruments SimpleLink CC2620 Technical Reference Manual page 173

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2.7.4.32 SHPR1 Register (Offset = D18h) [reset = 0h]
SHPR1 is shown in
System Handlers 4-7 Priority
This register is used to prioritize the following system handlers: Memory manage, Bus fault, and Usage
fault. System Handlers are a special class of exception handler that can have their priority set to any of
the priority levels. Most can be masked on (enabled) or off (disabled). When disabled, the fault is always
treated as a Hard Fault.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
RESERVED
R/W-0h
Bit Field
31-24 RESERVED
23-16 PRI_6
15-8 PRI_5
7-0 PRI_4
SWCU117C – February 2015 – Revised September 2015
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Figure 2-102 and described in
Figure 2-102. SHPR1 Register
PRI_6
R/W-0h
Table 2-128. SHPR1 Register Field Descriptions
Type Reset
R/W 0h
R/W 0h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 2-128.
9
PRI_5
R/W-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Priority of system handler 6. UsageFault
Priority of system handler 5: BusFault
Priority of system handler 4: MemManage
Cortex-M3 Processor Registers
8 7 6 5 4 3 2 1
PRI_4
R/W-0h
0
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