Texas Instruments SimpleLink CC2620 Technical Reference Manual page 189

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2.7.4.46 ID_MMFR0 Register (Offset = D50h) [reset = 100030h]
ID_MMFR0 is shown in
Memory Model Feature 0
General information on the memory model and memory management support.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 RESERVED
SWCU117C – February 2015 – Revised September 2015
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Figure 2-116 and described in
Figure 2-116. ID_MMFR0 Register
RESERVED
R-100030h
Table 2-142. ID_MMFR0 Register Field Descriptions
Type Reset
R 100030h
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Table 2-142.
9
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Cortex-M3 Processor Registers
8 7 6 5 4 3 2 1 0
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