Core Register Map - Texas Instruments SimpleLink CC2620 Technical Reference Manual

Cortex-M3 Core Registers

2.5.1 Core Register Map

Name
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
SP
LR
PC
PSR
PRIMASK
FAULTMASK
BASEPRI
CONTROL
2.5.2 Core Register Descriptions
This section lists and describes the Cortex-M3 registers, in the order listed in
registers are not memory mapped and are accessed by register name rather than offset.
See CM3_TIPROP
The register type shown in the register descriptions refers to type during program
NOTE:
execution in thread mode and handler mode. Debug access can differ.
2.5.2.1 Cortex General-Purpose Register 0 (R0)
Address Offset
Physical Address
Description
Type
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits Field Name
31-0 DATA
34
The Cortex-M3 Processor
Table 2-2. Processor Register Map
Type Reset
R/W —
R/W —
R/W —
R/W —
R/W —
R/W —
R/W —
R/W —
R/W —
R/W —
R/W —
R/W —
R/W —
R/W –
R/W 0xFFFF FFFF
R/W —
R/W 0x0100 0000
R/W 0x0000 0000
R/W 0x0000 0000
R/W 0x0000 0000
R/W 0x0000 0000
for more information.
Table 2-3. Cortex General-Purpose Register 0 (R0)
The R0 registers are 32-bit general-purpose registers for data operations and can be accessed from
either privileged or unprivileged mode.
R/W
Description
Register data
Copyright © 2015, Texas Instruments Incorporated
Description
Cortex general-purpose register 0
Cortex general-purpose register 1
Cortex general-purpose register 2
Cortex general-purpose register 3
Cortex general-purpose register 4
Cortex general-purpose register 5
Cortex general-purpose register 6
Cortex general-purpose register 7
Cortex general-purpose register 8
Cortex general-purpose register 9
Cortex general-purpose register 10
Cortex general-purpose register 11
Cortex general-purpose register 12
Stack pointer
Link register
Program counter
Program status register
Priority mask register
Fault mask register
Base priority mask register
Control register
Reset
Instance
DATA
SWCU117C – February 2015 – Revised September 2015
www.ti.com
Link
See Section 2.5.2.1.
See Section 2.5.2.2.
See Section 2.5.2.3.
See Section 2.5.2.4.
See Section 2.5.2.5.
See Section 2.5.2.6.
See Section 2.5.2.7.
See Section 2.5.2.8.
See Section 2.5.2.9.
See Section 2.5.2.10.
See Section 2.5.2.11.
See Section 2.5.2.12.
See Section 2.5.2.13.
See Section 2.5.2.14.
See Section 2.5.2.15.
See Section 2.5.2.16.
See Section 2.5.2.17.
See Section 2.5.2.18.
See Section 2.5.2.19.
See Section 2.5.2.20.
See Section 2.5.2.21.
Figure 2-3. The core
–
9 8 7 6 5 4 3 2
Type Reset
R/W —
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