Texas Instruments SimpleLink CC2620 Technical Reference Manual page 434

PRCM Registers
6.2.1.2 CTL1 Register (Offset = 4h) [reset = 0h]
CTL1 is shown in Figure 6-8
Control 1
This register contains various OSC_DIG configuration
31 30
23 22
RESERVED
R/W-0h
15 14
7 6
Bit Field
31-23 RESERVED
22-18 RCOSCHFCTRIMFRACT
17 RCOSCHFCTRIMFRACT
_EN
16-2 SPARE2
1-0 XOSC_HF_FAST_START R/W
434
Power, Reset, and Clock Management
and described in Table 6-10.
Figure 6-8. CTL1 Register
29 28
RESERVED
R/W-0h
21 20
RCOSCHFCTRIMFRACT
R/W-0h
13 12
SPARE2
R/W-0h
5 4
SPARE2
R/W-0h
Table 6-10. CTL1 Register Field Descriptions
Type Reset Description
R/W 0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
R/W 0h
Internal. Only to be used through TI provided API.
R/W 0h
Internal. Only to be used through TI provided API.
R/W 0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
0h
Internal. Only to be used through TI provided API.
Copyright © 2015, Texas Instruments Incorporated
27 26
19 18
RCOSCHFCTR
IMFRACT_EN
11 10
3 2
SWCU117C – February 2015 – Revised September 2015
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25 24
17 16
SPARE2
R/W-0h R/W-0h
9 8
1 0
XOSC_HF_FAST_START
R/W-0h