Texas Instruments SimpleLink CC2620 Technical Reference Manual page 462

PRCM Registers
6.2.3.5 AUXCTL Register (Offset = 10h) [reset = 0h]
AUXCTL is shown in
AUX Control
This register contains events and control signals for the AUX domain.
31 30
RESET_REQ
R/W-0h
23 22
15 14
7 6
Bit Field
31 RESET_REQ
30-3 RESERVED
2 SCE_RUN_EN
1 SWEV
0 AUX_FORCE_ON
462
Power, Reset, and Clock Management
Figure 6-30 and described in
Figure 6-30. AUXCTL Register
29 28
21 20
RESERVED
13 12
RESERVED
5 4
RESERVED
R-0h
Table 6-34. AUXCTL Register Field Descriptions
Type Reset
R/W 0h
R 0h
R/W 0h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 6-34.
27 26
RESERVED
R-0h
19 18
R-0h
11 10
R-0h
3 2
SCE_RUN_EN
R/W-0h
Description
Reset request for AUX. Writing 1 to this register will assert reset to
AUX. The reset will be held until the bit is cleared again.
0: AUX reset pin will be deasserted
1: AUX reset pin will be asserted
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Enables (1) or disables (0) AUX_SCE execution. AUX_SCE
execution will begin when AUX Domain is powered and either this or
AUX_SCE:CTL.CLK_EN is set.
Setting this bit will assure that AUX_SCE execution starts as soon
as AUX power domain is woken up. ( AUX_SCE:CTL.CLK_EN will
be reset to 0 if AUX power domain has been off)
0: AUX_SCE execution will be disabled if AUX_SCE:CTL.CLK_EN is
0
1: AUX_SCE execution is enabled.
Writing 1 sets the software event to the AUX domain, which can be
read through AUX_WUC:WUEVFLAGS.AON_SW.
This event is normally cleared by AUX_SCE through the
AUX_WUC:WUEVCLR.AON_SW. It can also be cleared by writing 0
to this register.
Reading 0 means that there is no outstanding software event for
AUX.
Note that it can take up to 1,5 SCLK_LF clock cycles to clear the
event from AUX.
Forces the AUX domain into active mode, overriding the requests
from AUX_WUC:PWROFFREQ, AUX_WUC:PWRDWNREQ and
AUX_WUC:MCUBUSCTL.
Note that an ongoing AUX_WUC:PWROFFREQ will complete before
this bit will set the AUX domain into active mode.
MCU must set this bit in order to access the AUX peripherals.
The AUX domain status can be read from PWRSTAT.AUX_PD_ON
0: AUX is allowed to Power Off, Power Down or Disconnect.
1: AUX Power OFF, Power Down or Disconnect requests will be
overruled
SWCU117C – February 2015 – Revised September 2015
www.ti.com
25 24
17 16
9 8
1 0
SWEV AUX_FORCE_
ON
R/W-0h R/W-0h
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