Prcm Registers - Texas Instruments SimpleLink CC2620 Technical Reference Manual

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6.2

PRCM Registers

6.2.1 DDI_0_OSC Registers
Table 6-8 lists the memory-mapped registers for the DDI_0_OSC. All register offset addresses not listed in
Table 6-8 must be considered as reserved locations and the register contents must not be modified.
Offset Acronym
0h CTL0
4h CTL1
8h RADCEXTCFG
Ch AMPCOMPCTL
10h AMPCOMPTH1
14h AMPCOMPTH2
18h ANABYPASSVAL1
1Ch ANABYPASSVAL2
20h ATESTCTL
24h ADCDOUBLERNANOAMPCTL
28h XOSCHFCTL
2Ch LFOSCCTL
30h RCOSCHFCTL
34h STAT0
38h STAT1
3Ch STAT2
SWCU117C – February 2015 – Revised September 2015
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Table 6-8. DDI_0_OSC Registers
Register Name
Control 0
Control 1
RADC External Configuration
Amplitude Compensation Control
Amplitude Compensation Threashold 1
Amplitude Compensation Threashold 2
Analog Bypass Values 1
Analog Bypass Values 2
Analog Test Control
ADC Doubler Nanoamp Control
XOSCHF Control
Low Frequency Oscillator Control
RCOSCHF Control
Status 0
Status 1
Status 2
Copyright © 2015, Texas Instruments Incorporated
PRCM Registers
Section 6.2.1.1
Section 6.2.1.2
Section 6.2.1.3
Section 6.2.1.4
Section 6.2.1.5
Section 6.2.1.6
Section 6.2.1.7
Section 6.2.1.8
Section 6.2.1.9
Section 6.2.1.10
Section 6.2.1.11
Section 6.2.1.12
Section 6.2.1.13
Section 6.2.1.14
Section 6.2.1.15
Section 6.2.1.16
Power, Reset, and Clock Management
Section
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