Texas Instruments SimpleLink CC2620 Technical Reference Manual page 82

Cortex-M3 Processor Registers
2.7.2.5 COMP2 Register (Offset = 10h) [reset = 0h]
COMP2 is shown in
Comparator 2
31 30
REPLACE
R/W-0h
23 22
15 14
7 6
Bit Field
31-30 REPLACE
29 RESERVED
28-2 COMP
1 RESERVED
0 ENABLE
82
Figure 2-28 and described in
Figure 2-28. COMP2 Register
29 28
RESERVED
R/W-0h
21 20
13 12
5 4
COMP
R/W-0h
Table 2-52. COMP2 Register Field Descriptions
Type Reset
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 2-52.
27 26
COMP
R/W-0h
19 18
COMP
R/W-0h
11 10
COMP
R/W-0h
3 2
Description
This selects what happens when the COMP address is matched.
Address remapping only takes place for the 0x0 setting.
0x0: Remap to remap address. See REMAP.REMAP
0x1: Set BKPT on lower halfword, upper is unaffected
0x2: Set BKPT on upper halfword, lower is unaffected
0x3: Set BKPT on both lower and upper halfwords.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Comparison address.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Compare and remap enable comparator 2. CTRL.ENABLE must also
be set to enable comparisons.
0x0: Compare and remap for comparator 2 disabled
0x1: Compare and remap for comparator 2 enabled
SWCU117C – February 2015 – Revised September 2015
www.ti.com
25 24
17 16
9 8
1 0
RESERVED ENABLE
R/W-0h R/W-0h
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