Texas Instruments SimpleLink CC2620 Technical Reference Manual page 55

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2.7.1.3 CPICNT Register (Offset = 8h) [reset = X]
CPICNT is shown in
CPI Count
This register is used to count the total number of instruction cycles beyond the first cycle.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-8 RESERVED
7-0 CPICNT
SWCU117C – February 2015 – Revised September 2015
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Figure 2-6 and described in
Figure 2-6. CPICNT Register
RESERVED
R/W-0h
Table 2-29. CPICNT Register Field Descriptions
Type Reset
R/W 0h
R/W X
Copyright © 2015, Texas Instruments Incorporated
Table 2-29.
9
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Current CPI counter value. Increments on the additional cycles (the
first cycle is not counted) required to execute all instructions except
those recorded by LSUCNT. This counter also increments on all
instruction fetch stalls. If CTRL.CPIEVTENA is set, an event is
emitted when the counter overflows. This counter initializes to 0
when it is enabled using CTRL.CPIEVTENA.
Cortex-M3 Processor Registers
8 7 6 5 4 3 2 1
CPICNT
R/W-X
0
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