Texas Instruments SimpleLink CC2620 Technical Reference Manual page 471

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6.2.3.13 JTAGCFG Register (Offset = 40h) [reset = 100h]
JTAGCFG is shown in
JTAG Configuration
This register contains control for configuration of the JTAG domain,- hereunder access permissions for
each TAP.
31 30
23 22
15 14
7 6
Bit Field
31-9 RESERVED
8 JTAG_PD_FORCE_ON
7-0 RESERVED
SWCU117C – February 2015 – Revised September 2015
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Figure 6-38 and described in
Figure 6-38. JTAGCFG Register
29 28
RESERVED
R-0h
21 20
RESERVED
R-0h
13 12
RESERVED
R-0h
5 4
RESERVED
R/W-0h
Table 6-42. JTAGCFG Register Field Descriptions
Type Reset
R 0h
R/W 1h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 6-42.
27 26
19 18
11 10
3 2
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Controls JTAG PowerDomain power state:
0: Controlled exclusively by debug subsystem. (JTAG Powerdomain
will be powered off unless a debugger is attached)
1: JTAG Power Domain is forced on, independent of debug
subsystem.
NB: The reset value causes JTAG Power Domain to be powered on
by default. Software must clear this bit to turn off the JTAG Power
Domain
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Power, Reset, and Clock Management
PRCM Registers
25 24
17 16
9 8
JTAG_PD_FO
RCE_ON
R/W-1h
1 0
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